A Scalable VLSI Architecture for Soft-Input Soft-Output Depth-First Sphere Decoding

摘要

Multiple-input multiple-output (MIMO) wireless transmission imposes hugechallenges on the design of efficient hardware architectures for iterativereceivers. A major challenge is soft-input soft-output (SISO) MIMO demapping,often approached by sphere decoding (SD). In this paper, we introduce the - toour best knowledge - first VLSI architecture for SISO SD applying a singletree-search approach. Compared with a soft-output-only base architecturesimilar to the one proposed by Studer et al. in IEEE J-SAC 2008, thearchitectural modifications for soft input still allow a one-node-per-cycleexecution. For a 4x4 16-QAM system, the area increases by 57% and the operatingfrequency degrades by 34% only.